Dr Bharatiraja: Switching Vector Placement to Achieve Self DC-Link Balancing in Z- Source NPC- MLI for EV Power Train Drive Applications

Abstract

The multi-level inverters (MLI) are used in most of the power electronic industries for its better harmonics performance, lower switching stress, lower losses etc. Generally, the 3-phase motors are in practice, but in recent years the multi-phase motors are gaining attraction due to its lower switching stress, reduced current per phase and better harmonic performances. For increasing the AC output voltage, the Z-source converter circuitry uses two identical structures: X-shaped capacitance and inductance, and an impedance network connected between the DC input source and the inverter circuit. The Neutral-Pointed Clamped (NPC) MLI is a topology from the MLI family that can accommodate all of the circuit and operation features of a traditional two-level inverter. The preceding literature review gives an overview of the work that has been done on space vector PWM development and implementation. It, on the other hand, lacks a thorough understanding of Z-source MLI space vector PWM development and implementation. The performance of similar space vector PWM on Z-source NPC-MLI with voltage buck and boost capabilities is examined using an X network for balancing the clamping level to assure voltage waveform quality and harmonics performance. Space vector modulation concepts integrated in Z-source NPC-multilevel inverter would constantly operate with the fewest number of device commutations per half switching carrier cycle and is configured to switch with low harmonic distortion. For phase current balancing, these methods select the inverter's nearest switching (nearest three vectors (NTV)). Although the NPC-MLI has been proven to be superior for drive applications, future PWM strategy tweaks and new topology advancements in the Z-source family can expand its application reach. In NPC MLIs, the SVPWM utilised for neutral point capacitor voltage management, neutral point voltage balancing is a crucial element.

   This research describes an enhanced space vector PWM for a Z Source Multi-Level Inverter that provides a single–stage power conversion by using single impedance (Z) network to raise its output AC voltage via shoot-through (ST) and non-ST. Nonetheless, the ST states limit the modulation index and create a large ST current in the phase legs of the inverter. The inductive boosting voltage and output levels are directly balanced by the Z networks. Existing approaches use the whole ST, which uses more switching commutations every cycle, resulting in unbalanced inductor charging and discharging, as well as higher harmonics in the output voltage and currents. This paper presents a new development of space vector PWM (SVPWM) model to improve the DC link unitization and DC link capacitors to balance the charging and discharging of inductors in a Z network. Simulations and experiments on a 2kW prototype in an FPGA setting with current schemes validate the suggested method. Its performance was tested using an induction motor.

     The proposed space vector PWM for a three phase 2kW three-level Z-source NPC multilevel inverter with an adjustable speed induction motor drive is explored for experimental verification. The Xilinx Spartan-6 -XC6SLX9 FPGA controller is used to corroborate the PWM signals.